Silicon Labs /EFR32MG24A010F1536GM40 /EMU_NS /RSTCTRL

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Interpret as RSTCTRL

31282724232019161512118743000000000000000000000000000000000000000000 (DISABLED)WDOG0RMODE0 (DISABLED)SYSRMODE0 (DISABLED)LOCKUPRMODE0 (DISABLED)AVDDBODRMODE0 (DISABLED)IOVDD0BODRMODE0 (DISABLED)DECBODRMODE

LOCKUPRMODE=DISABLED, WDOG0RMODE=DISABLED, IOVDD0BODRMODE=DISABLED, DECBODRMODE=DISABLED, AVDDBODRMODE=DISABLED, SYSRMODE=DISABLED

Description

No Description

Fields

WDOG0RMODE

Enable WDOG0 reset

0 (DISABLED): Reset request is blocked

1 (ENABLED): The entire device is reset except some EMU registers

SYSRMODE

Enable M33 System reset

0 (DISABLED): Reset request is blocked

1 (ENABLED): Device is reset except some EMU registers

LOCKUPRMODE

Enable M33 Lockup reset

0 (DISABLED): Reset Request is Block

1 (ENABLED): The entire device is reset except some EMU registers

AVDDBODRMODE

Enable AVDD BOD reset

0 (DISABLED): Reset Request is block

1 (ENABLED): The entire device is reset except some EMU registers

IOVDD0BODRMODE

Enable VDDIO0 BOD reset

0 (DISABLED): Reset request is blocked

1 (ENABLED): The entire device is reset except some EMU registers

DECBODRMODE

Enable DECBOD reset

0 (DISABLED): Reset request is blocked

1 (ENABLED): The entire device is reset

Links

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